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Nils Bosbach, M.Sc.

Scientific Staff

Room: 505
+49 241 80-27985
+49 241 80-28306
nils.bosbach(at)ice.rwth-aachen.de
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Biography

Nils Bosbach received his B.Sc. and M.Sc. degrees in Electrical Engineering from RWTH Aachen University in 2019 and 2022, respectively. Since 2022, he has been a Ph.D. student at the Institute of Communication Technologies and Embedded Systems under Prof. Rainer Leupers. His research focuses on acceleration methods for virtual prototyping of systems-on-chip.

Teaching

Praktikum Technische Informatik

Electronic Design Automation

Students

Alumni students:

Meik Schmidt
Johannes Rollmann

Publications

Bosbach, N., Zurstraßen, N., Pelke, R., Jünger, L., Weinstock, J. H. and Leupers, R.: Towards High-Performance Virtual Platforms: A Parallelization Strategy for SystemC TLM-2.0 CPU Models, in Design Automation Conference , Jun. 2024, accepted for publication, 10.1145/3649329.3658257
Bosbach, N., Salama, A., Jünger, L., Burton, M., Zurstraßen, N., Pelke, R. and Leupers, R.: NQC²: A Non-Intrusive QEMU Code Coverage Plugin, in Rapid Simulation and Performance Evaluation for Design (RAPIDO '24), January 18, 2024, Munich, Germany ( New York, NY, USA), Association for Computing Machinery, Jan. 2024, ISBN: 979-8-40071-791-8, 10.1145/3642921.3642924
Zurstraßen, N., Brandhofer, R., Cubero-Cascante, J., Bosbach, N., Jünger, L. and Leupers, R.: The Optimal Quantum of Temporal Decoupling, in 29th Asia and South Pacific Design Automation Conference, 2024, 10.1109/ASP-DAC58780.2024.10473967 ©2024 IEEE
Pelke, R., Cubero-Cascante, J., Bosbach, N., Staudigl, F., Leupers, R. and Joseph, J. M.: CLSA-CIM: A Cross-Layer Scheduling Approach for Computing-in-Memory Architectures, in Proceedings of the Conference on Design, Automation & Test in Europe (DATE), 2024, accepted for publication, 10.48550/arXiv.2401.07671 ©2024 IEEE
Pelke, R., Bosbach, N., Cubero-Cascante, J., Staudigl, F., Leupers, R. and Joseph, J. M.: Mapping of CNNs on multi-core RRAM-based CIM architectures, in 2023 IFIP/IEEE 31th International Conference on Very Large Scale Integration (VLSI-SoC) , Oct. 2023, 10.48550/arXiv.2309.03805 ©2023 IEEE
Bosbach, N., Pelke, R., Zurstraßen, N., Jünger, L., Weinstock, J. H. and Leupers, R.: Work-in-Progress: A Generic Non-Intrusive Parallelization Approach for SystemC TLM-2.0-based Virtual Platforms, in International Conference on Hardware/Software Codesign and System Synthesis , Sep. 2023, 10.1145/3607888.3608596
Bosbach, N., Jünger, L., Pelke, R., Zurstraßen, N. and Leupers, R.: Entropy-Based Analysis of Benchmarks for Instruction Set Simulators, in RAPIDO2023: Proceedings of the DroneSE and RAPIDO: System Engineering for constrained embedded systems (New York, NY, USA), pp. 54-59, Association for Computing Machinery, Jan. 2023, ISBN: 979-8-40070-045-3, 10.1145/3579170.3579267
Zurstraßen, N., Bosbach, N., Joseph, J. M., Jünger, L., Weinstock, J. H. and Leupers, R.: Efficient RISC-V-on-x64 Floating Point Simulation, in ICCD, 2023, 10.1109/ICCD58817.2023.00090 ©2023 IEEE
Zurstraßen, N., Reimann, L. M., Bosbach, N., Jünger, L. and Leupers, R.: Evaluation of the RISC-V Floating Point Extensions, in DVCon, 2023
Bosbach, N., Jünger, L., Joseph, J. M. and Leupers, R.: NISTT: A Non-Intrusive SystemC-TLM 2.0 Tracing Tool, in 2022 IFIP/IEEE 30th International Conference on Very Large Scale Integration (VLSI-SoC) , IEEE, 2022, ISBN: 978-1-66549-006-1, ISSN: 2324-8440, 10.1109/VLSI-SoC54400.2022.9939578 ©2022 IEEE

Maximilian Bartel

José Cubero