Gereon Onnebrink

Thesis & Student Jobs

Students interested in a BSc/MSc thesis or a HiWi job are asked to make an appointment via email to personally visit the institute. Open positions can be found here.

All my topics are focusing on power estimation and optimization.

Gereon Führ (born Onnebrink), MSc.

Scientific Staff

Room: 506
+49 241 80-28303
+49 241 80-28306
Gereon.Fuehr(at)ice.rwth-aachen.de

Biography

Gereon Führ (born Onnebrink) received the M.Sc. degree in Electrical Engineering from the RWTH Aachen University in 2014. Since 2015, he is PhD student at the institute of Communication Technologies and Embedded Systems under the supervision of Prof. Rainer Leupers. His main research focus are power estimation and power optimization of embedded MPSoCs.

 

Publications

Führ (Onnebrink), G., Hamurcu, S., Pala, D., Grass, T., Leupers, R., Ascheid, G. and Eusse, J. F.: Automatic Energy-Minimised HW/SW Partitioning for FPGA-Accelerated MPSoCs, In (IEEE ESL) Feb/2019, accepted for publication, 10.1109/LES.2019.2901224


Führ (Onnebrink), G., Hallawa, A., Leupers, R., Ascheid, G. and Shaheen, A.: A Heuristic for Multi Objective Software Application Mappings on Heterogeneous MPSoCs, in Proceedings of the Asia South Pacific Design Automation Conference (ASP-DAC) Jan/2019, 10.1145/3287624.3287651


Führ (Onnebrink), G., Leupers, R. and Ascheid, G.: ESL Black Box Power Estimation: Automatic Calibration for IEEE UPF 3.0 Power Models, in Proceedings of the 2018 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools , (Manchester, England) Jan/2018, 10.1145/3180665.3180667


Führ (Onnebrink), G., Walbroel, F., Klimt, J., Leupers, R., Ascheid, G., Murillo, L. G., Schürmans, S., Chen, X. and Harn, Y.: DVFS-Enabled Power-Performance Trade-Off in MPSoC SW Application Mapping, in International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS) Jul/2017 ©2017 IEEE


Schürmans, S., Führ (Onnebrink), G., Leupers, R., Ascheid, G. and Chen, X.: Frequency-Aware ESL Power Estimation for ARM Cortex-A9 Using a Black Box Processor Model, In (ACM TECS) Vol. 16 , p.p. 26:1--26:26 , No. 1 Oct/2016, ISSN: 1539-9087, 10.1145/2987375


Führ (Onnebrink), G., Leupers, R., Ascheid, G. and Schürmans, S.: Black box ESL power estimation for loosely-timed TLM models, in ViPES Workshop 2016 Jul/2016 ©2016 IEEE


Leupers, R., Schürmans, S., Aguilar, M. A. and Führ (Onnebrink), G.: Power-Aware Multicore Software Development, In Embedded World Conference 2016 Feb/2016


Führ (Onnebrink), G., Schürmans, S., Walbroel, F., Leupers, R., Ascheid, G., Chen, X. and Harn, Y.: Black box power estimation for digital signal processors using virtual platforms, in Proceedings of the 2016 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools Jan/2016, 10.1145/2852339.2852345


Schürmans, S., Führ (Onnebrink), G., Leupers, R., Ascheid, G. and Chen, X.: ESL Power Estimation using Virtual Platforms with Black Box Processor Models, in ViPES Workshop 2015 , p.p. 354 - 359 Jul/2015, 10.1109/SAMOS.2015.7363698