Dominik Šišejković


Dominik Šišejković received the B.Sc. and M.Sc. degree in software engineering from the Faculty of Electrical Engineering and Computing, University of Zagreb, Croatia, in 2014 and 2016, respectively. In February 2022, he defended the Ph.D. (Dr.-Ing.) thesis at the Faculty of Electrical Engineering and Information Technology, RWTH Aachen University with the grade "summa cum laude" (with the highest honor). From Sep/2016 to Feb/2022 he worked as a research assistant at the Institute for Communication Technologies and Embedded Systems. From Sep/2017 to Feb/2022, he worked as Technical Project Officer of the EU-funded project TETRAMAX; facilitating technology transfer from academia to European SMEs. From Oct/2018 to June/2022, he was the Chief Engineer of the Chair for Software for Systems on Silicon. Since Feb/2022, he has been working as a postdoctoral researcher at the Institute for Communication Technologies and Embedded Systems. Since 2019, he has co-organized the annual SeHAS workshop on secure hardware, architectures and operating systems at the HiPEAC conference. Since 2020, he has been part of the technical committee for the hardware and systems security track at the International Symposium on Quality Electronic Design (ISQED).

For his doctoral work, he contributed to various aspects of logic locking (a hardware protection methodology), thereby focusing on preventing malicious design modifications (hardware Trojans) within hardware designs. In addition, he was directly involved in the design and implementation of the logic-locking framework that was applied for the production of the first logic-locked RISC-V processor core on the market.


  • Best Ph.D award at the IFIP/IEEE VLSI-SoC conference (2021). 
  • ICT Young Researcher Award by RWTH Aachen University for significant contributions in the ICT research area (2020).
  • HiPEAC Technology Transfer Award for successfully transferring a scalable logic-locking framework for hardware integrity protection to the industry (2020).

Research Interest

  • Hardware Security
  • Security-Aware Electronic Design Automation (EDA)
  • Secure Processor Design
  • Embedded Systems
  • Machine Learning for Security


Publications from Jun/ 2017 to 2014

Picek, S., Šišejković, D. and Jakobović, D.: Immunological Algorithms Paradigm for Construction of Boolean Functions with Good Cryptographic Properties, in Engineering Applications of Artificial Intelligence, Vol. 62, pp. 320 - 330, Jun. 2017, ISSN: 0952-1976, 10.1016/j.engappai.2016.11.002

Picek, S., Šišejković, D., Jakobović, D., Batina, L., Yang, B., Sijacic, D. and Mentens, N.: Extreme Pipelining Towards the Best Area-Performance Trade-Off in Hardware, in International Conference on Cryptology in Africa (AFRICACRYPT), ACM, pp. 147-166, Apr. 2016, 10.1007/978-3-319-31517-1_8

Picek, S., Šišejković, D., Rozic, V., Yang, B., Jakobović, D. and Mentens, N.: Evolving Cryptographic Pseudorandom Number Generators, in Parallel Problem Solving from Nature (PPSN), Springer International Publishing, pp. 613--622, 2016, 978-3-319-45823-6_57

Batina, L., Jakobović, D., Picek, S., de la Piedra, A. and Šišejković, D.: S-box Pipelining Using Genetic Algorithms for High-Throughput AES Implementations: How Fast Can We Go?, in International Conference on Cryptology in India (Indocrypt), Springer International Publishing, pp. 322--337, 2014, 10.1007/978-3-319-13039-2_19