Jünger, L., Bianco, C., Niederholtmeyer, K., Petras, D. and Leupers, R.: Optimizing Temporal Decoupling using Event Relevance, in Proceedings of the Asia South Pacific Design Automation Conference (ASP-DAC), 2021, accepted for publication
Copic, M., Leupers, R. and Ascheid, G.: Modelling Machine Learning Components for Mapping and Scheduling of AUTOSAR Runnables, in Proceedings of 31st International Symposium on Software Reliability Engineering (ISSRE), Oct. 2020, accepted for publication
Führ (Onnebrink), G., Hallawa, A., Leupers, R., Ascheid, G. and Eusse, J. F.: 3D Optimisation of Software Application Mappings on Heterogeneous MPSoCs, in ARCS - International Conference on Architecture of Computing Systems, Mar. 2020, accepted for publication
Copic, M., Leupers, R. and Ascheid, G.: Reducing Idle Time in Event-Triggered Software Execution via Runnable Migration and DPM-Aware Scheduling, in Integration, the VLSI Journal, Vol. 70, Elsevier, pp. 10-20, Jan. 2020, 10.1016/j.vlsi.2019.09.004
Rainer Leupers received the M.Sc. (Dipl.-Inform.) and Ph.D. (Dr. rer. nat.) degrees in Computer Science with honors from TU Dortmund in 1992 and 1997. From 1997-2001 he was the Chief Engineer at the Embedded Systems Chair at TU Dortmund. In 2002, he joined RWTH Aachen University as a professor for Software for Systems on Silicon. His research comprises embedded software development tools, multicore processor architectures, hardware security, and system-level electronic design automation. He served in committees of the leading international EDA conferences and received various scientific awards, including Best Paper Awards at DAC and twice at DATE, as well as several industrial awards. Dr. Leupers is also engaged as an entrepreneur and in turning research results into innovations. He holds several patents and has been a co-founder of LISATek (now with Synopsys), Silexica, and Secure Elements. As the coordinator of the TETRACOM and TETRAMAX projects, he contributes to EU-wide academia-to-industry technology transfer.